MiniBus is a misleading name. It is not the full external memory controller found on the LPC22xx or LPC24xx parts; it is an 8-bit data, 16-bit address parallel interface. The LPC2378FBD144 is otherwise the largest 144-pin member of the 72 MHz LPC23xx family: 512 KB of flash, 58 KB of SRAM, 104 GPIO, eight 10-bit ADC channels, a 10-bit DAC, an RMII Ethernet MAC, a USB device, two CAN channels and SD/MMC. Restoring a locked LPC2378FBD144 microcontroller requires understanding exactly what that bus can and cannot carry.
What MiniBus Actually Provides
The interface supports static memory-mapped devices over an 8-bit data path and a 16-bit address path. It cannot replace the 32-bit-wide, four-bank EMC of a LPC2468, and it is not a boot source in the sense that a ROMless LPC2210 uses CS0. Firmware still lives in the 512 KB on-chip flash array. A board may attach a small parallel display, an ADC or a latch to the MiniBus, and that device can hold data, but it does not hold the reset vector.
That distinction matters when a board arrives with several memory-looking chips. We identify each by marking and pinout, then decide which of them belongs in the delivery. Concatenating external contents into the internal image produces a file that no reference board will ever run.
Boundary Scan Is Not A Read Path
A restore locked LPC2378FBD144 microcontroller job turns on what the MiniBus actually carries.
This package supports boundary scan for board testing, which occasionally leads to the assumption that the flash can be shifted out through the JTAG chain. Boundary scan observes and controls package pins. It does not address the on-chip flash array, and CRP1 already disables the JTAG debug port. It is a manufacturing test feature, useful for confirming that a solder joint is sound and irrelevant to recovering program code.
The Array
Five hundred and twelve kilobytes yields 504 KB of user space; the last 8 KB at 0x7E000 is the boot block holding ISP, IAP and RealMonitor. Twenty-eight sectors run from 4 KB at the bottom through 32 KB in the middle to 4 KB near the top. Sector 0 contains the eight exception vectors, the checksum at 0x14 and the CRP word at 0x1FC.
Boundary scan is sometimes mistaken for a read path on this package. It controls and observes pins for board test; it does not address the on-chip array, and the first CRP value already disables the JTAG debug port. The other two values reduce ISP to a whole-chip erase and then ignore the P2.10 entry pin while valid user code exists. None of them encrypts the flash. What they do is remove interfaces, which is why our intake notes record which signals the board actually routes before anyone calls the part locked.
IAP, And The Four SRAM Pools
The 58 KB of SRAM splits into 32 KB on the ARM local bus, 16 KB for Ethernet, 8 KB for USB and GPDMA, and 2 KB on the RTC battery domain. IAP calls from the boot ROM at 0x7FFFFFF0 require their source data in the local bus block, with a 256-byte-aligned destination and transfers of 256, 512, 1024 or 4096 bytes. CRP does not disable IAP, because shipped products need a field-update path. A recovered image often contains the loop that stages one 32 KB sector at a time.
Eight ADC channels and 104 GPIO give this part a wide peripheral surface, but all of it is volatile. Calibration constants, if any, will be in a flash sector the application treats as data, and the sector map will show it as programmed but non-executable.
Verification
We read the array twice, retain error-correction bytes, recompute the vector checksum and mark blank sectors rather than padding them. ARM and Thumb instruction streams can alternate at subroutine boundaries, so a flat 32-bit decode is not used for analysis. The delivered note records the CRP word, boot ROM revision and any external device found on the MiniBus.
Related Work
The contact page handles intake of board photographs and markings. The protection walkthrough sets out the layers in order, and this 32-bit ARM case shows a comparable workflow. Compare the LPC2368FBD100, which shares the 512 KB array in a 100-pin package, and the LPC2468FBD208, whose EMC really does support a full external bus and SDRAM.