The 8-Pin Workhorse Of Its Generation
The PIC12F1822 packs 2,048 words of flash (0x0000-0x07FF), 128 bytes of SRAM and a genuine 256-byte data EEPROM at 0xF00000 into eight pins, with six I/O lines, four channels of ten-bit ADC, one comparator, an ECCP, an EUSART and an MSSP. It is one of the most widely deployed 8-pin parts of its generation – remote controls, sensor tags, small chargers – and one of the most frequent recovery subjects.
Two Windows, Two Bits
CONFIG1 at 0x8007 carries CP for the array and CPD for the EEPROM; the ID is at 0x8006. The locks are independent, and field parts show every combination, so the session always sweeps both:
– Array: 0x0000-0x07FF, 0x000 under CP. – EEPROM: 0xF00000-0xF000FF, gated by CPD alone. – Erased cells: 0xFFFF; above 0x07FF: unmapped, 0x000.
On boards where only CP was set, the EEPROM returns its 256 bytes of calibration, serial numbers or pairing keys even while the code stays dark – repeatedly the difference between a recoverable product and a redesign.
Image Anatomy
Despite the size, a 1822 image is complete: an ECCP for PWM or capture, an EUSART for a serial link, comparator interrupts as fast trip paths, and the SR latch emulating a 555 in some designs. The oscillator block tunes the internal 32 MHz clock; the tuning word written by factory calibration is visible near the config region. The 128-byte SRAM budget shows as tight ring buffers on the serial path.
The Session
Identify via the ID word, read both configuration words, sweep both windows over two-wire ICSP, verify every array word decodes legally. Nothing is erased; the part returns to service. The found lock policy is documented before any clone discussion, and replacement parts can be flashed with or without protection.
Deliverables
HEX file at word addresses, EEPROM dump as a separate artifact, annotated disassembly, configuration report, checksum tied to the die. For the larger 8-pin sibling, see the PIC12F1840 page.
Two Thousand Words, Eight Pins
The PIC12F1822 is an eight-pin enhanced mid-range part: 2,048 words of flash, 128 bytes of SRAM, 256 bytes of data EEPROM, six I/O, four ten-bit ADC channels, one ECCP, one EUSART and one MSSP. It runs to 32 MHz and appears in sensors, adapters and small chargers where a serial interface has to be added to an analog circuit.
EEPROM As The Valuable Region
Two hundred fifty-six bytes of EEPROM is small, but on this class of product it holds the serial number, the calibration offsets and often a copy of the configuration that the firmware checks at start-up. If the EEPROM checksum fails the firmware may refuse to run, which is why a recovery that returns only the flash leaves the client with an image that will not boot on a replacement part. The session always reads the EEPROM and delivers it as a separate file.
– Flash: 0x0000-0x07FF (2K words), 0x3FFF erased, 0x0000 protected. – EEPROM: 0xF00000-0xF000FF. – Configuration: 0x8007-0x8008, device ID 0x8006.
Six I/O And What They Do
Six usable pins means at most one serial port and one analog input in most designs, so the disassembly is short and the peripheral configuration is a handful of registers. The interesting part is usually the protocol: an eight-pin adapter implements a proprietary command set that the client’s host software expects, and that command dispatch table is what the report annotates in detail.
Output
HEX at word addresses, the EEPROM as a separate binary, an annotated disassembly with the command dispatch table labelled, configuration report, checksum tied to the die.
Delivery
EEPROM is delivered as its own binary with a byte map, because the serial number and the calibration offsets are usually re-used independently of the code when a replacement is built.
To copy a locked 12F1822, write to the services desk or the contact form.