PIC16F1703 Program Heximal From An Analog-Light 14-Pin Die

The 170x Line Without The Analog Baggage

The PIC16F1703 is the stripped member of the 170x intelligent-analog family – stripped, in this case, of the very peripherals that name the family. The family table lists zero comparators, zero DAC, zero op-amps and zero zero-cross detect on the 1703: what it carries is 2,048 words of flash (0x0000-0x07FF), 256 bytes of SRAM, twelve I/O lines, eight channels of ten-bit ADC, the COG (Complementary Output Generator), one Configurable Logic Cell, an MSSP, and no EUSART. Boards built on it use the COG for power conversion and the ADC for feedback – nothing more.

Lock And Sweep

CONFIG1 at 0x8007 with the single CP bit; ID at 0x8006; no EEPROM, with the High-Endurance Flash window at the top of the array (0x0780-0x07FF). Rules:

– 0x0000-0x07FF: array, 0x000 under CP, 0xFFFF when erased. – 0x0780-0x07FF: HEF, swept with the array. – Above 0x07FF: unmapped, 0x000.

The 2K boundary is shared with the 20-pin PIC16F1707 and separates both from the 4K PIC16F1704 and PIC16F1708 – packages repeat, the ID word decides.

Image Anatomy

A 1703 listing is short and dense: COG dead-band and polarity setup from a PWM source, an eight-channel ADC loop with software trip decisions, and an MSSP block for board-level SPI or I2C. With no serial hardware, no interrupt-heavy framework appears; most designs run a short main loop while the COG handles the power stage in hardware. The 256-byte SRAM holds state variables and averaging accumulators. HEF contents – feedback setpoints and thermal limits – are the region that changed most over the product’s life.

The Session

Work starts at the ID word, not at address zero: on a fourteen-pin die the package is shared with two other members and only the ID settles which one is in the socket. From there the two configuration words come out, then 0x0000-0x07FF is walked word by word. Two thousand words can be read twice and compared inside the same session, so this part is one of the few where a full second pass is routine rather than optional.

Deliverables

HEX at word addresses, annotated disassembly with COG, ADC and HEF regions labeled, configuration report, checksum tied to the die. Clone policy documented. For the analog-equipped 170x members, see the PIC16F1704 and PIC16F1705 pages.

Two Thousand Words, No Analog Blocks

Strip the analog blocks away and what remains is a converter with a three-register setup: channel select, format, and the conversion trigger. That brevity is useful, because it means the twelve-pin part’s image can be read top to bottom in one sitting and every constant accounted for. Designs on this die are usually simple enough that the recovered firmware doubles as documentation of the product’s whole behaviour.

What A Minimal Image Contains

With no analog blocks to configure, the init code is a handful of register writes and the image is mostly decision logic. That makes the 1703 one of the quickest parts in this batch to annotate completely, and it makes it a useful reference: a client with several 170x variants in a product family can have the smallest one read first and then use it as a map for the others.

– Flash: 0x0000-0x07FF (2K words), 0x3FFF erased, 0x0000 protected. – Configuration: 0x8007-0x8008, device ID 0x8006.

Twelve Pins In A Real Product

Twelve I/O lines cover a relay, a sensor input, two status LEDs and a serial port, which is the shape of most products built on this part. The disassembly then reads as a simple state machine with a debounce routine, and the debounce constants – sample count and interval – are the values that determine how the finished product feels to a user.

Output

HEX at word addresses, annotated disassembly with the state machine and debounce constants labelled, configuration report, checksum tied to the die.

Delivery

With no analog blocks to describe, the report is short: a listing, a configuration word and a checksum. Most of its value is in the debounce constants, which are called out with the sample interval they imply.

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