The PIC18F8620 is the 64 KB member of the PIC18FXX20 family documented in DS39609: 32,768 single-word instructions, 3,840 bytes of SRAM, 1,024 bytes of data EEPROM, a 16-channel 10-bit A/D converter, five CCP modules, two addressable USARTs, a parallel slave port, and an external memory interface addressing up to 2 MB, all in an 80-pin TQFP with ports A through J.
Sixty-Four Kilobytes Change the Map
Flash occupies byte addresses 0x000000 to 0x00FFFF, and the code protection bits divide it into four equal blocks of 16 KB — CP0 through CP3. This is the largest block size in the family scaling: a 16 KB part quarters into 4 KB blocks, a 32 KB part into 8 KB, and this part into 16 KB. A dump that stops at 0x3FFF, 0x7FFF or 0xBFFF is one, two or three quarters of the device, and a partial read at a block boundary looks complete in a hex editor until you check the array size.
A full internal dump is 4,096 Intel HEX records at 16 bytes. Protected blocks answer 0x0000 — a legal NOP instruction on PIC18, so locked quarters disassemble as plausible code — while erased flash reads 0xFFFF. The device ID at 0x3FFFFE tells you which you are looking at; the PIC18 copy protection scheme explains the gate in detail.
The 25 MHz Detail
The XX20 family runs at up to 40 MHz, but the data sheet caps the devices with the external memory interface — this part — at 25 MHz when the interface is active. It is a small line with a practical consequence: config words that select a high-frequency primary oscillator while the external bus is enabled describe a design that cannot have worked, which usually means the config you are looking at came from a different board or a different part. When the recovered config contradicts the board, believe the board and re-read the config region.
What a Partial Read Looks Like
At this array size the block boundaries matter more than on smaller parts, and the failure modes of an incomplete read are worth naming. A dump that stops at 0x3FFF is a quarter of the device; it opens in a hex editor without complaint, its reset vector may even resolve, and nothing about the file itself says it is short. The only defence is arithmetic against the array size — 4,096 HEX records, or 65,536 bytes — checked before the file is accepted.
The subtler case is a locked quarter in the middle of the array: bytes 0x4000–0x7FFF reading 0x0000 between real code on both sides. Because 0x0000 disassembles as NOP, the region reads as a long run of harmless instructions and cursory review calls it padding. On a five-CCP control part, a missing 16 KB quarter usually removes exactly the control routines, and the rebuilt board passes a boot test before failing at the first output stage. Two independent reads and a comparison are the only reliable filter.
Five CCP Modules and a Parallel Slave Port
Parts with five CCP channels drive multi-axis timing, multi-phase PWM or dense capture work, and the parallel slave port suggests a design that talked to another processor over an 8-bit bus. Expect the image to be bus-heavy: address arithmetic, handshake code, and table walks. If the external memory interface was used, code legitimately references addresses above 0xFFFF at devices sitting next to the MCU — data the internal dump does not contain. Check what the board carries beside the processor before declaring the internal array a complete recovery. Our services page separates die-level read-outs from board-level work for this reason.
The EEPROM at 0xF00000 is read as its own region and read twice; on parts with five CCP channels it typically holds per-channel calibration that a rebuilt unit misses the first time a parameter matters.
Verification Standard
Two independent reads of the array, compared byte for byte. The reset vector resolving into real code. No abrupt holes at the 16 KB boundaries. The EEPROM read twice. The config words at 0x300000 recorded — oscillator, brown-out, watchdog — and sanity-checked against the board’s crystal and supply. Reading the program memory sets out the procedure and chip extraction analysis covers the post-read review that turns a complete file into a usable one.
The 32 KB sibling in the same family is the PIC18F8520, same package and pinout. Confirm which device is actually fitted — the markings under conformal coating are famously unreliable, and the difference is 32 KB of array. Contact us with the marking photo and what the board does when it works.