The 40-pin version of the 4K 6x part, with the parallel slave port that made this family attractive to designers who needed a microcontroller that could also be a peripheral. No converter, 33 I/O, 192 bytes of RAM, and two serial ports sharing pins with the parallel bus.
A Microcontroller That Is Also A Peripheral
The slave port lets a host processor treat this device as a memory-mapped peripheral: eight data lines, a read strobe, a write strobe and a chip select. That is why the part appears in instruments and industrial boards with a second processor.
Reconstructing it means reconstructing the interface rather than the algorithm. The firmware is mostly a loop that watches for a host cycle and responds, and the timing of that response is the specification.
4K Across Two Pages
Four kilobytes means a boundary at 0800h and PCLATH participation in long jumps. On a part whose main job is a host interface, the cross-page calls tend to sit in the interrupt handler, where a bank error produces a failure that appears only when the host is active.
We resolve banks statically where possible and drive the host interface on hardware for the rest.
The Host Cycle In Detail
A slave-port cycle is short: the host asserts chip select, puts an address or a data byte on the bus, and strobes. The device has until the strobe ends to respond, and the response window is set by the firmware’s loop rate rather than by hardware.
On a 4K part with interrupts enabled, that window competes with every interrupt handler. Firmware that works at 4 MHz can miss a cycle at 20 MHz because the handler got longer, which is why we test at the upper end of the permitted range.
Why Thirty-Three Pins Is The Right Number
Thirty-three I/O plus a host bus is enough for a front panel, a keypad and a display, with the serial ports available for a printer or a service link. That combination describes a whole generation of industrial instruments.
Reconstructing the pin map on this part means reconstructing which of those functions the design actually used, and the configuration word plus the direction registers answer that in a way the schematic no longer can.
The Fuse And The Window
An EPROM part of this generation can arrive as a windowed ceramic device, and a window changes the job: after erasure the die can be reprogrammed and the read becomes repeatable. On a plastic OTP part there is one attempt.
We state which package arrived in the delivery, because the customer’s ability to rework the part later depends on it.
The Host Has To Be Built
There is no way to test a slave port with a meter. We build a small host that asserts the chip select, writes a pattern, reads it back, and reverses the direction, then repeat the sequence at the fastest rate the datasheet permits.
That second pass is what separates a working interface from a reliable one. A port that drops a byte at half speed will drop more at full speed, and the customer will find out in production.
No Converter, So No Reference
Without an analogue block, the electrical requirements reduce to logic levels and drive strength. That makes the rebuild test a digital exercise: every pin as an input, as an output, and as a high-impedance node.
It also makes the delivery shorter. There is no channel map, no reference characterisation and no sample timing to report, which is why jobs on this part close faster than the word count suggests.
Reading The Part
Fuse photographed, configuration decoded, ID recorded, array swept twice across both pages. The 40/44-pin package opens with a generous window, and the die is large enough that probe placement is not delicate.
Delivery
Binary, HEX with configuration, a listing with bank annotations, the slave port test at two host speeds, the pin map, and the shared-pin notes for the serial ports.
The 28-pin 4K part is the PIC16C63A page, the 2K communication member is the PIC16C62B job, and the equivalent 4K part with a converter is the PIC16C74A page. Lead times go through the services desk.