The EUSART module generates an RCIF interrupt coincident with the wake-up event to Extract Microchip PIC18F24J11 Controller Firmware. The interrupt is generated synchronously to the Q clocks in normal CPU operating modes (below Figure),
and asynchronously if the device is in Sleep mode (below Figure). The interrupt condition is cleared by reading the RCREG register.
The WUE bit is automatically cleared by the low-to-high transition on the RX line at the end of the Break. This signals to the user that the Break event is over. At this point, the EUSART module is in Idle mode waiting to receive the next character.
When the wake-up is enabled the function works independent of the low time on the data stream. If the WUE bit is set and a valid non-zero character is received, the low time from the Start bit to the first rising edge will be interpreted as the wake-up event.
The remaining bits in the character will be received as a fragmented character and subsequent characters can result in framing or overrun errors.
Therefore, the initial character in the transmission must be all ‘0’s. This must be 10 or more bit times, 13-bit times recommended for LIN bus, or any number of bit times for standard RS-232 devices.
Oscillator Start-up Time
Oscillator start-up time must be considered, especially in applications using oscillators with longer start-up intervals (i.e., LP, XT or HS mode). The Sync Break (or wake-up signal) character must be of sufficient length, and be followed by a sufficient interval to Extract Microchip PIC18F24J11 Controller Firmware, to allow enough time for the selected oscillator to start and provide proper initialization of the EUSART.
WUE Bit
The wake-up event causes a receive interrupt by setting the RCIF bit. The WUE bit is cleared in hardware by a rising edge on RX/DT. The interrupt condition is then cleared in software by reading the RCREG register and discarding its contents.
To ensure that no actual data is lost, check the RCIDL bit to verify that a receive operation is not in process before setting the WUE bit. If a receive operation is not occurring, the WUE bit may then be set just prior to entering the Sleep mode.
