Microcontroller PIC18F8680 Program Copying

The CCPRxH register and a 2-bit internal latch are used to double-buffer the PWM duty cycle. This double-buffering is essential for glitchless PWM operation to carry out Microcontroller PIC18F8680 Program Copying. When the CCPRxH and 2-bit latch match TMR2, concatenated with an internal 2-bit Q clock or 2 bits of the TMR2 prescaler, the CCPx pin is cleared. The maximum PWM resolution (bits) for a given PWM frequency is given by the equation:

The PWM auto-shutdown features of the enhanced CCP module are also available to CCP1 in 28-pin devices. The operation of this feature is discussed in detail in Section 16.4.7 “Enhanced PWM Auto-Shutdown”. Auto-shutdown features are not available for CCP2. The following steps should be taken when configuring the CCP module for PWM operation when copy code from MCU:

Set the PWM period by writing to the PR2 register. Set the PWM duty cycle by writing to the Auto-shutdown features are not available for CCP2. CCPRxL register and CCPxCON<5:4> bits. Make the CCPx pin an output by clearing the appropriate TRIS bit. Set the TMR2 prescale value, then enable Timer2 by writing to T2CON.

Microcontroller PIC18F8680 Program Copying
Microcontroller PIC18F8680 Program Copying

Configure the CCPx module for PWM operation. In PIC18F8680 devices, CCP1 is implemented as a standard CCP module with enhanced PWM capabilities. These include the provision for 2 or 4 output channels, user selectable polarity, dead-band control and automatic shutdown and restart.

The enhanced features are discussed in detail in Section 16.4 “Enhanced PWM Mode”. Capture, Compare and single-output PWM functions of the ECCP module are the same as described for the standard CCP module if the binary of chip has been copied.

The control register for the enhanced CCP module is shown in Register 16-1. It differs from the CCPxCON registers in PIC18F2420/2520 devices in that the two Most Significant bits are implemented to control PWM functionality.

In addition to the expanded range of modes available through the CCP1CON register and ECCP1AS register, the ECCP module has an additional register associated with Enhanced PWM operation and auto-shutdown features before firmware of IC has been copied. It is:

PWM1CON (Dead-band delay)

The enhanced CCP module may have up to four PWM outputs, depending on the selected operating mode when Recover MCU program. These outputs, designated P1A through P1D, are multiplexed with I/O pins on PORTC and PORTD. The outputs that are active depend on the CCP operating mode selected.

The pin assignments are summarized in Table 16-1. To configure the I/O pins as PWM outputs, the proper PWM mode must be selected by setting the P1M1:P1M0 and CCP1M3:CCP1M0 bits. The appropriate TRISC and TRISD direction bits for the port pins must also be set as outputs.